The PLA chip (906114-01) used in the Commodore C64 is a generic 82S100 gate array with custom programming. Its logic functions were dumped and reverse engineered by the community and are available from a variety of sources. They’re reused for this particular PLA replacement in the FPGA Arcade 28 pin DIL CPLD board.

Two approaches exist to build such a PLA replacement:

1. Implementation based on a truth table with 216 entries, each entry consiting of 8 bits and programmed into an EPROM chip.
2. Reverse engineered logic equations programmed into a PLD.

Both approaches result in the same logic functionality when implemented in a CPLD. Since equations are more common for CPLDs, I chose this implementation style for the final design. However, there’s a variant for the truth table available which has been verified in simulation but not in real C64 hardware. Following are descriptions for both of them.

We have run simulations proving that the equations perfectly match the truth table, so both compiled outputs are effectively identical in the C64 implementation discussed here.

source: fpgaarcade.com